BeebSCSI Hardware Guide

BeebSCSI board 7_7

Overview

The BeebSCSI 7_7 version board is an incremental improvement over the previous 7_5 version and is intended for professional PCB manufacturing.  The new features are as follows:

  • Smaller PCB (66 x 51mm)
  • Four M3 mounting holes (fits both Master AIV slot as well as external case mounting)
  • Straight and right-angle configuration (all sockets and headers can now be right-angled if required)
  • Single JTAG programming chain with shared header (between AVR and CPLD)
  • Support for Tag-Connect programming adapters
  • Fiducial markers for pick-and-place manufacturing compatibility
  • All components on top-copper layer
  • Improved silkscreen with better component orientation markers
  • Design rebuilt using KiCAD rather than (closed-source) EagleCAD
  • New microSD socket (provides overhang of the microSD card for better internal and case mounting options)
  • All active and passive component SMT (except headers and connectors)
  • JST-EH power connector to prevent incorrect cable orientation
  • USB to AVR header with required USB support components (to support future expansion)
  • All SMT passives now 0805 footprint
BeebSCSI 7_7

Schematic

The BeebSCSI 7_5 schematic is split over 5 pages.  The first page shows the overall functional blocks of the schematic and interconnection of the blocks (including the 3V3 power regulation circuit).  Note that the JTAG programming header is shared between the AVR and the CPLD as a ‘JTAG-chain’.  There are two devices in the chain, first is the AVR followed by the CPLD:

BeebSCSI 7_5 Schematic – Page_1

The 1 MHz bus sheet shows the interconnection between the BeebSCSI board and the Acorn 1 Mhz bus connector including signal pull-up and pull-down resistor networks.  The routing between the 1 MHz bus IDC connector, the terminating resistor networks and the CPLD is designed to minimise the required board space as much as possible:

BeebSCSI 7_5 Schematic – Page 2

The third schematic sheet show the SCSI host adapter functionality provided the the Xilinx CPLD programmable logic IC (this provides the glue-logic between the Acorn 1 MHz bus and SCSI-1).  The routing between the CPLD and the AVR is also optimised for routing as much as is possible:

BeebSCSI 7_5 Schematic – Page 3

The forth schematic sheet shows the SCSI drive emulator functionality provided by an AVR microcontroller. . Note that the on board 5V serial port does not provide power; it is designed to work with a USB based converter that is self-powered from the USB port of the host computer. The design uses a mix of 3V3 and 5Vs with the AVR running at 16 MHz at 5Vs and the CPLD running at 3V3. Since the SD card is driven by the AVR, it requires a line-level conversion to provide 3V3 signals to the SD card:

BeebSCSI 7_5 Schematic – Page 4

The fifth schematic sheet shows the microSD card interface, power control and line-level conversion functionality. The SD card circuitry includes a 3V3 to 5V line-level converter IC and a MOSFET power control (allowing the SD card to be powered up and down in software) – this design is to ensure maximum compatibility with a wide-range of SD cards:

BeebSCSI 7_5 Schematic – Page 5

PCB

Manufacturing information

The following specifications are recommended for manufacture of the PCB:

  • Layers: 2
  • Dimension: 66mm x 51mm
  • PCB Thickness: 1.6mm
  • PCB Colour: Green
  • Surface Finish: HASL (with lead)
  • Copper Weight: 1oz
  • Material Details: FR4-Standard Tg 140C

Bill of Materials

The BeebSCSI 7_7 board uses the following bill of materials:

Ref Qnty Value Footprint
C1, C2 2 10uF Tant Capacitors_Tantalum_SMD:CP_Tantalum_Case-B_EIA-3528-21_Reflow
C3, C4, C5, C6, C7, C8, C9, C12 8 100nF Capacitors_SMD:C_0805
C10, C11 2 22pF Capacitors_SMD:C_0805
C14, C13 2 1uF Capacitors_SMD:C_0805
D1 1 Status LED LEDs:LED_0805
F1, F2, F3 3 Fiducial Fiducials:Fiducial_0.5mm_Dia_1mm_Outer
IC1 1 AT90USB1287 Housings_QFP:TQFP-64_14x14mm_Pitch0.8mm
J1 1 5V Power Connectors_JST:JST_EH_B02B-EH-A_02x2.50mm_Straight
J2 1 BBC 1 MHz Bus Connectors_Multicomp:Multicomp_MC9A12-3434_2x17x2.54mm_Straight
J3 1 JTAG-IDC Pin_Headers:Pin_Header_Straight_2x05_Pitch2.54mm
J4 1 JTAG-TC Connectors:Tag-Connect_TC2050-IDC-NL
J5 1 TTL Serial Pin_Headers:Pin_Header_Straight_1x06_Pitch2.54mm
J6 1 Micro_SD_Card_Det Molex-47309-3751:microSD_Holder_Molex-47309-3751
J7 1 USB Connectors_JST:JST_EH_B04B-EH-A_04x2.50mm_Straight
MK1, MK2, MK3, MK4 4 Mounting_Hole Mounting_Holes:MountingHole_3.2mm_M3
Q1 1 ZXMP3A13FTA TO_SOT_Packages_SMD:SOT-23
R1 1 2K2 Resistors_SMD:R_0805
R2 1 470R Resistors_SMD:R_0805
R3, R10 2 10K Resistors_SMD:R_0805
R7, R4, R5, R6 4 47K Resistors_SMD:R_0805
R8, R9 2 22R Resistors_SMD:R_0805
RN6, RN8, RN5, RN7, RN2, RN4, RN1, RN3, RN10, RN9 10 2K2 Resistors_SMD:R_Array_Convex_4x0603
U1 1 LM1117-3.3 TO_SOT_Packages_SMD:SOT-223-3_TabPin2
U2 1 XC9572XL Housings_QFP:TQFP-64_10x10mm_Pitch0.5mm
U3 1 74AHC125S SMD_Packages:SOIC-14_N
Y1 1 16MHz Crystal Crystals:Crystal_SMD_5032-2pin_5.0x3.2mm

Straight configuration

The following picture shows the BeebSCSI 7_7 PCB populated in the ‘straight’ configuration (i.e. all headers and connectors are 90 degrees from the board):

BeebSCSI 7_7 – Top

Right-angled configuration

The following picture shows the BeebSCSI 7_7 PCB populated in the ‘right-angle’ configuration (i.e. all headers and connectors are parallel to the board):

BeebSCSI 7_7 – Right-angle configuration

BeebSCSI VFS Adapter 1_5

Overview

The internal 1 MHz bus of the BBC Master is provided via a 20 pin SIL connector (Single In-Line) and has a different pin out from the external 1 MHz bus. The internal bus also only supplies 4 address lines. Electronically the internal bus is also different to the external as it used CMOS levels rather than TTL.

This generates an issue for BeebSCSI as the CMOS level signals are quite noisy and the noise peaks can cause the board to read bytes incorrectly. To use BeebSCSI with the internal bus it is necessary to use an adaptor board that provides CMOS to TTL level conversion for all control signals as well as converting the 20 pin SIL to the 34 way IDC used by the external bus. The adaptor board also provides a 5V signal on to the internal/external detect pin of the CDPL allowing the CDPL to detect that it is connected to the internal bus (and therefore switch logic to the AIV Host Adapter).

Schematic

The schematic for the BeebSCSI internal bus adapter is shown in the following diagram:

VFS Adapter Schematic 1_5

The adapter board provides CMOS to TTL line-level conversion and a 5V signal to indicate that BeebSCSI is connected to the internal bus. The adaptor board also contains a 500mA PTC (a self-resetting fuse) to protect the Master’s PSU (and BeebSCSI) from incorrect wiring. The adaptor board also provides a 5V power output (with the same pinout as BeebSCSI) to allow BeebSCSI to be powered from the adapter board (and, therefore, the BBC Master PSU).

Important note: Since the internal bus adapter card provides a 5V signal on (what should be) a 0V ground it should not be used to connect any other 1 MHz bus device other than a BeebSCSI board.  The PTC fuse should protect the Master against any such use, but it’s better not to rely on the fail-safe!

PCB

Manufacturing information

The BeebSCSI Internal Bus Adapter PCB design is a double-sided board intended for professional PCB manufacture. The PCB CAD files can be freely downloaded from the BeebSCSI project website.

The following specifications are recommended for manufacture of the PCB:

  • Layers: 2
  • Dimension: 66mm x 51mm
  • PCB Thickness: 1.6mm
  • PCB Color: Green
  • Surface Finish: HASL (with lead)
  • Copper Weight: 1oz
  • Material Details: FR4-Standard Tg 140C

The adapter provides a 34 way IDC connector for connection to the BeebSCSI board. In addition there is a JST-EH 2 pin header for supplying power from the adapter to the BeebSCSI board. As BBC Masters have two different types of connectors for the internal bus, the adapter board supplies a set of 20 connections that can be terminated in either a male or female connector.  The BeebSCSI VFS adapter (1_5) is shown in the following picture:

BeebSCSI VFS adapter (1_5)

Note: The top copper layer of the PCB (shown in the picture above) should be facing away from the Master’s power supply.  Reversing the VFS adapter will cause damage to the connected BeebSCSI board.

BeebSCSI board 7_5 (Obsolete)

Note: The BeebSCSI 7_5 board has been superceded by the 7_7 version.  This section is included for reference only.

Schematic

The BeebSCSI schematic (board revision 7_5) is split over two sheets. The first sheet contains the CPLD and AVR microcontroller:

BeebSCSI Schematic 7_5 Sheet 1

The routing between the 1 MHz bus IDC connector, the terminating resistor networks and the CPLD is designed to minimise the required board space as much as possible. The routing between the CPLD and the AVR is also optimised in the same manner as much as is possible. Note that the on board 5V serial port does not provide power; it is designed to work with a USB based converter that is self-powered from the USB port of the host computer.

The design uses a mix of 3V3 and 5Vs with the AVR running at 16 MHz at 5Vs and the CPLD running at 3V3. Since the SD card is driven by the AVR, it requires a line-level conversion to provide 3V3 signals to the SD card.

The second sheet contains the SD card socket, line-level conversion and the 3V3 power regulation circuits:

BeebSCSI Schematic 7_5 Sheet 2

The schematic diagrams are drawn using the Eagle CAD application (version 7.7) and can be freely downloaded from the BeebSCSI project website. Note that the 3 pin power connector is designed so the power connector can be connected in either orientation without the opportunity to provide a reversed polarity to the supply rails.

The SD card circuitry includes a 3V3 to 5V line-level converter IC and a MOSFET power control (allowing the SD card to be powered up and down in software) – this design is to ensure maximum compatibility with a wide-range of SD cards.

PCB

The BeebSCSI PCB design is a double-sided board designed so that it can be both hand-printed and professionally manufactured. The PCB measures approximately 80mm x 50mm. The PCB CAD files can be freely downloaded from the Domesday86 project website.

The PCB design ensures that no soldered connections are located under a component and component pins are not used as vias (since this is not possible to do when making your own PCB using a method such as UV transfer). The board vias are also large to allow side-to-side vias using wires rather than via plating available on professionally made PCBs.

The bottom-side of the PCB is primarily used for the power rails and decoupling and the top-side contains most of the signal routing. The exception is the SD card socket that is mounted on the bottom of the board due to space considerations.

The following image shows the top-side of the PCB (rendered with components in Eagle CAD):

BeebSCSI PCB 7_5 Top

The following image shows the bottom-side of the PCB:

BeebSCSI PCB 7_5 Bottom

Note: In the 7_5 version of the board there is an error in the silkscreen for the CPLD JTAG – the pins are labelled in reverse order. 3V3 is the pin nearest the IDC and TMS is furthest from the IDC.  This will be corrected in the next board revision.

BeebSCSI VFS Adapter 1_4 (Obsolete)

Note: The BeebSCSI VFS 1_4 adapter has been superceded by the 1_5 version.  This section is included for reference only.

Overview

The internal 1 MHz bus of the BBC Master is provided via a 20 pin SIL connector (Single In-Line) and has a different pin out from the external 1 MHz bus. The internal bus also only supplies 4 address lines. Electronically the internal bus is also different to the external as it used CMOS levels rather than TTL.

This generates an issue for BeebSCSI as the CMOS level signals are quite noisy and the noise peaks can cause the board to read bytes incorrectly. To use BeebSCSI with the internal bus it is necessary to use an adaptor board that provides CMOS to TTL level conversion for all control signals as well as converting the 20 pin SIL to the 34 way IDC used by the external bus. The adaptor board also provides a 5V signal on to the internal/external detect pin of the CDPL allowing the CDPL to detect that it is connected to the internal bus (and therefore switch logic to the AIV Host Adapter).

Schematic

The schematic for the BeebSCSI internal bus adapter is shown in the following diagram:

BeebSCSI Internal Bus Adapter

The adapter board provides CMOS to TTL line-level conversion and a 5V signal to indicate that BeebSCSI is connected to the internal bus. The adaptor board also contains a 500mA PTC (a self-resetting fuse) to protect the Master’s PSU (and BeebSCSI) from incorrect wiring. The adaptor board also provides a 5V power output (with the same pinout as BeebSCSI) to allow BeebSCSI to be powered from the adapter board (and, therefore, the BBC Master PSU).

Important note: Since the internal bus adapter card provides a 5V signal on (what should be) a 0V ground it should not be used to connect any other 1 MHz bus device other than a BeebSCSI board.  The PTC fuse should protect the Master against any such use, but it’s better not to rely on the fail-safe!

PCB

The BeebSCSI Internal Bus Adapter PCB design is a double-sided board intended for professional PCB manufacture. The PCB CAD files can be freely downloaded from the BeebSCSI project website.

The adapter provides a 34 way IDC connector for connection to the BeebSCSI board. In addition there is a 3 pin header for supplying power from the adapter to the BeebSCSI board. As BBC Masters have two different types of connectors for the internal bus, the adapter board supplies a set of 20 connections that can be terminated in either a male or female connector.  The BeebSCSI VFS adapter (1_4) is shown in the following picture:

BeebSCSI VFS Adapter 1_4